# Purpose and Context
This document shows how to configure and execute the self-test feature, for ICM-456xx sensors. This procedure has been tested with ICM-45686-S, and should also work for ICM-45605(-S) and ICM-45686, and other ICM-456xx variants.
# Hardware Setup
The MCU is connected to the sensor using a 4-wire SPI connection. The code below is written in Micropython v1.25.0.
# Initialize the SPI Bus and Sensor
We configure our MCU's 4-wire SPI bus, and reset the sensor
``` python
SPI_BUS_NUMBER = 0
spi = SPI(SPI_BUS_NUMBER, baudrate=800000, polarity=1, phase=1, bits=8,
sck=Pin(18, mode=Pin.OUT),
mosi=Pin(19, mode=Pin.OUT),
miso=Pin(20, mode=Pin.IN)
) # CPOL=1, CPHA=1 --> SPI mode 3
cs = Pin(24, mode=Pin.OUT, value=1)
icm456xx = ICM456xx(io_protocol=SPI_SLAVE(spi, cs))
icm456xx.reset()
```
SPI transactions and comments:
```
SPI-Write,addr: 0x7F,data: 0x02
```
# Self-Test Config
Next we prepare the self-test program to be executed.
``` python
icm456xx.ireg_write(IPREG_TOP1+0x4F, 0x00) # EDMP_PRGRM_IRQ0_0 - PRGM_STRT_ADDR_IRQ_0[7:0] - LSB for Program Address 0 value 0x00
icm456xx.ireg_write(IPREG_TOP1+0x50, 0x40) # EDMP_PRGRM_IRQ0_1 - PRGM_STRT_ADDR_IRQ_0[15:8] - MSB for Program Address 0 value 0x40
icm456xx.ireg_write(IPREG_TOP1+0x51, 0x04) # EDMP_PRGRM_IRQ1_0 - PRGM_STRT_ADDR_IRQ_1[7:0] - LSB for Program Address 1
icm456xx.ireg_write(IPREG_TOP1+0x52, 0x40) # EDMP_PRGRM_IRQ1_1 - PRGM_STRT_ADDR_IRQ_1[15:8] - MSB for Program Address 1
icm456xx.ireg_write(IPREG_TOP1+0x53, 0x08) # EDMP_PRGRM_IRQ2_0 - PRGM_STRT_ADDR_IRQ_2[7:0] - LSB for Program Address 2
icm456xx.ireg_write(IPREG_TOP1+0x54, 0x40) # EDMP_PRGRM_IRQ2_1 - PRGM_STRT_ADDR_IRQ_2[15:8] - MSB for Program Address 2
icm456xx.ireg_write(IPREG_TOP1+0x55, 0x05) # EDMP_SP_START_ADDR - EDMP Start address value 0x05
icm456xx.ireg_write(IPREG_TOP1+0xA7, 0x03) # EDMP_SP_START_ADDR - FIFO_GSLEEP_SHARED_SRAM - Power Up eDMP SRAM value 0x03
icm456xx.ireg_write(IMEM_SRAM+0x38, 0b10000111) # IMEM_SRAM_REG_56 - STC_INIT_EN - enable accel/gyro self-test, set LSBit for ST_AVG_TIME
icm456xx.ireg_write(IMEM_SRAM+0x39, 0b11111110) # IMEM_SRAM_REG_57 - ST_GYRO_LIMIT ST_ACCEL_LIMIT ST_AVG_TIME
icm456xx.ireg_write(IMEM_SRAM+0x3C, 0x00) # IMEM_SRAM_REG_60 - Do not use patch mechanism (undocumented)
icm456xx.ireg_write(IMEM_SRAM+0x3D, 0x00) # IMEM_SRAM_REG_61 - Do not use patch mechanism (undocumented)
icm456xx.write(0x73, 0b1) # REG_HOST_MSG - TESTOPENTABLE
icm456xx.write(0x3A, 0b000) # INT_APEX_CONFIG1 - INT_STATUS_MASK_PIN_SELFTEST_DONE - Enable self-test done interrupt
icm456xx.ireg_write(IPREG_TOP1+0x73, 0) # STATUS_MASK_PIN_16_23 - INT_ON_DEMAND_PIN_2_DIS
```
SPI transactions and comments:
```
SPI-Write,addr: 0x7C,data: 0xA2 0x4F 0x00
SPI-Write,addr: 0x7C,data: 0xA2 0x50 0x40
SPI-Write,addr: 0x7C,data: 0xA2 0x51 0x04
SPI-Write,addr: 0x7C,data: 0xA2 0x52 0x40
SPI-Write,addr: 0x7C,data: 0xA2 0x53 0x08
SPI-Write,addr: 0x7C,data: 0xA2 0x54 0x40
SPI-Write,addr: 0x7C,data: 0xA2 0x55 0x05
SPI-Write,addr: 0x7C,data: 0xA2 0xA7 0x03
SPI-Write,addr: 0x7C,data: 0x00 0x38 0x87
SPI-Write,addr: 0x7C,data: 0x00 0x39 0xFE
SPI-Write,addr: 0x7C,data: 0x00 0x3C 0x00
SPI-Write,addr: 0x7C,data: 0x00 0x3D 0x00
SPI-Write,addr: 0x73,data: 0x01
SPI-Write,addr: 0x3A,data: 0x00
SPI-Write,addr: 0x7C,data: 0xA2 0x73 0x00
```
# Self-Test Execution
Finally, we execute the self-test program.
``` python
icm456xx.write(0x2A, 0b1000000)# EDMP_APEX_EN1 - EDMP_ENABLE
icm456xx.write(0x73, 0b100001) # EDMP_ON_DEMAND_EN - EDMP_ON_DEMAND_EN
csv_logfile.comment("Self-test running now...")
sleep(1) # allow time for self-test to pass
SELFTEST_DONE = (icm456xx.read(0x3C, 1)[0]) # INT_APEX_STATUS1 - INT_STATUS_SELFTEST_DONE
SELFTEST_DONE = (SELFTEST_DONE & 0b100) >> 2
csv_logfile.comment(f"...Did self-test complete? --> {bool(SELFTEST_DONE)}")
icm456xx.write(0x3A, 0b100) # INT_APEX_CONFIG1 - INT_STATUS_MASK_PIN_SELFTEST_DONE
SELFTEST_RESULT = icm456xx.ireg_read(IMEM_SRAM+0x44)[0]
SELFTEST_RESULT_str = list(f"{SELFTEST_RESULT:08b}")
csv_logfile.comment(f"... Self-test successful?: {not bool(SELFTEST_RESULT)} (0b{SELFTEST_RESULT:b} - see IMEM_SRAM_REG_68 register if needed)")
```
SPI transactions and comments:
```
SPI-Write,addr: 0x2A,data: 0x40
SPI-Write,addr: 0x73,data: 0x21
[Comment],"Self-test running now..."
SPI-Read,addr: 0x3C,data: 0x04
[Comment],"...Did self-test complete? --> True"
SPI-Write,addr: 0x3A,data: 0x04
SPI-Write,addr: 0x7C,data: 0x00 0x44
SPI-Read,addr: 0x7E,data: 0x00
[Comment],"... Self-test successful?: True (0b0 - see IMEM_SRAM_REG_68 register if needed)"
```
# Revision History
- 2026-01-26 - initial release
ICM-456xx Self-Test